ARM Assembly Language Programming by Peter J Cockerell

By Peter J Cockerell

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By Peter J Cockerell

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If there is no S, none of the flags will be changed. For example, if an instruction ADDS É yields a result which is negative, then the N flag will be set. However, just ADD É will not alter N (or any other flag) regardless of the result. After the mnemonic are the three operands. is the destination, and is the register number where the result of the ADD is to be stored. g. 0 for R0, it recognises R0, R1, R2 etc. to stand for the register numbers. In addition, you can define a name for a register and use that instead.

The following s have no field: CMN, CMP, TEQ, TST. They allow the use of the {P} option to set the field in the machine code to R15 instead of the default R0. The following s have no field: MOV, MVN. ? ? and are registers. is # where is a 12-bit shifted immediate operand, or , or , where is LSL, ASL, ASR, LSR, ROR 22 of 37 ARM Assembly Language Programming - Chapter 3 - The Instruction Set and where is # or where is five-bit unsigned value, or ?

So the address actually used to store the data is + Offset formats The is specified in one of two ways. It may be an immediate number in the range 0 to 4095, or a (possibly) shifted register. For example: STR R0,[R1,#20] will store R0 at byte address R1+20. The offset may be specified as negative, in which case it is subtracted from the base address. An example is: STR R0,[R1,#-200] 23 of 37 ARM Assembly Language Programming - Chapter 3 - The Instruction Set which stores R0 at R1 -200.

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